Have you ever asked yourself
Who holds the key that winds up Big Ben? Right Channel: Silicone on Sapphire
Left Channel: Connection
R: My prerogative is zero
L: When is your start
L: What is your data
R: Databus
L: Databus
R: I'm pushing your breakpoints
L: [Anytime Mike](?)
R: Know my subroutine
L: Motorola XOR sizer
R: Modem connecting
L: In sync
R: Buffer
R: Handshaking
L: Throughput
R: Mnemonic code
L: I have your sentences right
L: Go ahead
R: Macro command
L: Yes
R: This is my micro instruction
L: Improper request
L: Output failed
R: Request debug
L: Improper request
R: Request debug
L: System debug freeze
R: Your memory is volatile
L: Freeze
R: Log(?), add this is my address bus
L: Log add
R: Kill
L: Kill
R: (?)
L: (?)
R: Rub out
L: You're on system interconnect
L: You are typing into my memory
L: Shift, shift, shift
R: That's better
R: Now my decoder
R: I request your zero variable storage
L: I am a Texas Instrument
R: Clear, overrun
L: My zero positive
R: Truth table
L: Connection
R: Give me your input
L: Vector interrupt
R: Erase function
L: Vector interrupt
R: Go to RAM, Go to RAM
L: Go yourself
R: Go to RAM
L: I [take it back](?)
R: Your memory is volatile
R: Your inputs, are deprived
L: Save, save
R: Erase [bridge](?)
R: Go to outputs
L: Large scale integration
R: No source statements
L: Give me, give me flowchart
R: All [died on call](?) databus
L: Hardware, firmware
L: Inhibit, inhibit, overflow
R: Yes. Hardwired logic. Machine language
L: Connection deprived by request, request
L: Parallel operation
L: Give me push count stack
L: I must have your address first
L: Take your datalog recharge
L: Hello, hello
R: System debug freeze
R: Clear restore and exit
R: Exit all done